On complex systems, it is very hard to draw the line between willingly missing out critial issues and sincerely doing so.
Basically, it will end up that any non-permanently audited assembly written software by possibly anybody (that would make open source mandatory by law), and non-permanently audited hardware (that would make VHDL/Verilog open source mandatory by law) would become illegal.
On complex systems, it is very hard to draw the line between willingly missing out critial issues and sincerely doing so.
Basically, it will end up that any non-permanently audited assembly written software by possibly anybody (that would make open source mandatory by law), and non-permanently audited hardware (that would make VHDL/Verilog open source mandatory by law) would become illegal.